core: Make TIMER0 ISR noblock
The TIMER0 ISR takes 1.5us and can affect IBMPC protocol ISR. Add ISR_NOBLOCK to allow interrupt during TIMER0 ISR.
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@ -115,7 +115,7 @@ uint32_t timer_elapsed32(uint32_t last)
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// excecuted once per 1ms.(excess for just timer count?)
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// excecuted once per 1ms.(excess for just timer count?)
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ISR(TIMER0_COMPA_vect)
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ISR(TIMER0_COMPA_vect, ISR_NOBLOCK)
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{
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{
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timer_count++;
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timer_count++;
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}
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}
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