core: Make TIMER0 ISR noblock

The TIMER0 ISR takes 1.5us and can affect IBMPC protocol ISR.
Add ISR_NOBLOCK to allow interrupt during TIMER0 ISR.
This commit is contained in:
tmk 2020-05-21 15:41:34 +09:00
parent f80601db96
commit 0ab0ebf8cb

View file

@ -115,7 +115,7 @@ uint32_t timer_elapsed32(uint32_t last)
}
// excecuted once per 1ms.(excess for just timer count?)
ISR(TIMER0_COMPA_vect)
ISR(TIMER0_COMPA_vect, ISR_NOBLOCK)
{
timer_count++;
}