Add keyboard/kl27z_kbd
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keyboard/kl27z_kbd/README.md
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keyboard/kl27z_kbd/README.md
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KL27Z128/256 board
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==================
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2016/11/30
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KL27Z is configured to use internal 48MHz RC oscillator.
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The board has push button on PTA4 and LED on PTD7. The button works as 'a' key and the LED as an indicator for capslock.
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ELF board
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---------
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This board acommodates 48QFN chip.
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### prototypte pinout
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- pcb layout https://deskthority.net/resources/image/33293
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- schematic https://deskthority.net/resources/image/33252
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```
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G G
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N 5 D D N F D D D D D D
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D V - + D G \ USB / 6 5 4 3 2 1
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,--------------------- | Conn | --------------------.
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|39 40 41 42 43 44 | | 1 2 3 4 5 6 |
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3.3V|38 |_________| 7 |D0
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A0|37 RST 8 |C7
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A3|36 9 |C6
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+A20|35 10|C5+
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E20|34 11|C4
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E21|33 BL 12|C3
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E29|32 13|C2
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|31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14|
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`-------------------------------------------------------'
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E E E A A A 3 A G A C B B B B B C C
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3 2 2 1 2 4 . 1 N 1 1 1 2 3 1 1 0 1
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0 4 5 + + 3V 8 D 9 6 7
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1 PTD6 12 PTC3 23 GND 34 PTE20*
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2 PTD5 13 PTC2 24 PTA18 35 PTA20/Reset+
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3 PTD4 14 PTC1 25 3.3V 36 PTA3/SWD_DIO
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4 PTD3* 15 PTC0* 26 PTA4/NMI+ 37 PTA0/SWD_CLK
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5 PTD2* 16 PTB17* 27 PTA2 38 3.3V
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6 PTD1* 17 PTB16* 28 PTA1+ 39 GND
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7 PTD0* 18 PTB3* 29 PTE25* 40 VBUS/VREGIN/5V
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8 PTC7 19 PTB2* 30 PTE24* 41 USB D-
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9 PTC6 20 PTB1 31 PTE30 42 USB D+
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10 PTC5+ 21 PTB0 32 PTE29* 43 GND
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11 PTC4 22 PTA19 33 PTE21* 44 USB Shield/FB
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+: Pins with resistor or switch
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*: Pins which don't exist in QFN32
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```
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TMK KL27Z breakout
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------------------
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This board acommodates 48QFN chip.
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### Pinputs
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_\ conn /_
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1 28
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: :
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: PROG :
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: RST :
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14 15
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----------
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1 VUSB 28 GND
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2 VIN/VREGIN 27 PTD4
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3 PTD5 26 PTC7
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4 PTD6 25 PTC6
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5 PTD7 24 PTC5+
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6 PTE0* 23 PTC4
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7 3.3V 22 GND
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8 PTE30 21 PTC3
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9 PTA0/SWD_CLK 20 PTC2
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10 PTA1+ 19 PTC1
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11 PTA2 18 PTB1
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12 PTA3/SWD_DIO 17 PTB0
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13 PTA4/NMI+ 16 PTA20/Reset+
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14 PTA18 15 PTA19
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*: Pin which doesn't exist in QFN48
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#### Pinouts difference between 32QFN and 48QFN
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48QFN doesn't have PTE0
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32QFN doesn't have PTD0-3, PTC0, PTE20-21,24,25,29, PTB2-3,16,17
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### ROM bootloader pins
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See Reference Manual Chapter 13.
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PTA2 LPUART0_TX
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PTA1 LPUART0_RX *
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PTB0 I2C0_SCL
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PTB1 I2C0_SDA
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PTC4 SPI0_SS_b *
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PTC7 SPI0_MISO
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PTC6 SPI0_MOSI
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PTC5 SPI0_SCK *
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Due to errata e9457, need to pull-up `SPI0_SS_b`(or `SPI0_SCK`) to prevent false detection of SPI.
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The errata doesn't refer UART though, `LPUART0_RX` also requires pull-up or down resisitor from experience.
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Without resistor it easily false-detects activity on UART interface with finger touch on the pin.
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Resources
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---------
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### Deskthority thread
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https://deskthority.net/workshop-f7/can-we-design-the-teensy-alternative-for-keyboards-t13662-510.html
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### Kinetis KL2x
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http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/l-series-ultra-low-power-m0-plus/kinetis-kl2x-48-mhz-usb-ultra-low-power-microcontrollers-based-on-arm-cortex-m0-plus:KL2x
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### KL27Z128/256 Data Sheet
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http://www.nxp.com/assets/documents/data/en/data-sheets/KL27P64M48SF6.pdf
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### KL27Z128/256 Reference Manual
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http://www.nxp.com/assets/documents/data/en/reference-manuals/KL27P64M48SF6RM.pdf
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### Errata
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http://www.nxp.com/assets/documents/data/en/errata/KINETIS_L_1N71K.pdf
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>>
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e9457: Kinetis Flashloader/ ROM Bootloader: The peripheral auto-detect code in
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bootloader can falsely detect presence of SPI host causing non-responsive
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bootloader
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Description: During the active peripheral detection process, the bootloader can interpret spurious data on
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the SPI peripheral as valid data. The spurious data causes the bootloader to shutdown all
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peripherals except the “falsely detected" SPI and enter the command phase loop using the
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SPI. After the bootloader enters the command phase loop using the SPI, the other peripherals
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are ignored, so the desired peripheral is no longer active.
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The bootloader will not falsely detect activity on the I2C, UART, or USB interfaces, so only the
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SPI interface is affected.
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Workaround: Ensure that there is an external pull-up on the SPI chip-select pin or that the pin is driven high.
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This will prevent the bootloader from seeing spurious data due to activity on the SPI clock pin.
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### Kinetis Bootloader and blhost
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http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/kinetis-symbols-footprints-and-models/kinetis-bootloader:KBOOT
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Build
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-----
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make
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Program
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-------
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Flash firmware with ROM bootloader.
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blhost -u -- flash-image build/kl27z.hex erase
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TODO
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----
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- Fix boards/ELF files
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- add macro `USBx_CTL_RESUME` to ChibiOS-Contrib/os/common/ext/CMSIS/KINETIS/kl27zxxx.h
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