commit
53bd4a01be
17 changed files with 372 additions and 67 deletions
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@ -42,5 +42,6 @@ void bootloader_jump(void) {
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#endif /* defined(KIIBOHD_BOOTLOADER) */
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#else /* neither STM32 nor KINETIS */
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__attribute__((weak))
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void bootloader_jump(void) {}
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#endif
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@ -4,11 +4,27 @@
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#include "led.h"
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#include "sleep_led.h"
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#if defined(KL2x) || defined(K20x) /* platform selection: familiar Kinetis chips */
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/* All right, we go the "software" way: LP timer, toggle LED in interrupt.
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/* All right, we go the "software" way: timer, toggle LED in interrupt.
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* Based on hasu's code for AVRs.
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* Use LP timer on Kinetises, TIM14 on STM32F0.
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*/
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#if defined(KL2x) || defined(K20x)
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/* Use Low Power Timer (LPTMR) */
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#define TIMER_INTERRUPT_VECTOR KINETIS_LPTMR0_IRQ_VECTOR
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#define RESET_COUNTER LPTMR0->CSR |= LPTMRx_CSR_TCF
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#elif defined(STM32F0XX)
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/* Use TIM14 manually */
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#define TIMER_INTERRUPT_VECTOR STM32_TIM14_HANDLER
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#define RESET_COUNTER STM32_TIM14->SR &= ~STM32_TIM_SR_UIF
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#endif
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#if defined(KL2x) || defined(K20x) || defined(STM32F0XX) /* common parts for timers/interrupts */
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/* Breathing Sleep LED brighness(PWM On period) table
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* (64[steps] * 4[duration]) / 64[PWM periods/s] = 4 second breath cycle
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*
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@ -22,8 +38,8 @@ static const uint8_t breathing_table[64] = {
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15, 10, 6, 4, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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};
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/* Low Power Timer interrupt handler */
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OSAL_IRQ_HANDLER(KINETIS_LPTMR0_IRQ_VECTOR) {
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/* interrupt handler */
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OSAL_IRQ_HANDLER(TIMER_INTERRUPT_VECTOR) {
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OSAL_IRQ_PROLOGUE();
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/* Software PWM
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@ -55,11 +71,16 @@ OSAL_IRQ_HANDLER(KINETIS_LPTMR0_IRQ_VECTOR) {
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}
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/* Reset the counter */
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LPTMR0->CSR |= LPTMRx_CSR_TCF;
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RESET_COUNTER;
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* common parts for known platforms */
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#if defined(KL2x) || defined(K20x) /* platform selection: familiar Kinetis chips */
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/* LPTMR clock options */
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#define LPTMR_CLOCK_MCGIRCLK 0 /* 4MHz clock */
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#define LPTMR_CLOCK_LPO 1 /* 1kHz clock */
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@ -144,7 +165,48 @@ void sleep_led_toggle(void) {
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LPTMR0->CSR ^= LPTMRx_CSR_TEN;
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}
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#else /* platform selection: not on familiar Kinetis chips */
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#elif defined(STM32F0XX) /* platform selection: STM32F0XX */
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/* Initialise the timer */
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void sleep_led_init(void) {
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/* enable clock */
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rccEnableTIM14(FALSE); /* low power enable = FALSE */
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rccResetTIM14();
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/* prescale */
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/* Assuming 48MHz internal clock */
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/* getting cca 65484 irqs/sec */
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STM32_TIM14->PSC = 733;
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/* auto-reload */
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/* 0 => interrupt every time */
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STM32_TIM14->ARR = 3;
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/* enable counter update event interrupt */
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STM32_TIM14->DIER |= STM32_TIM_DIER_UIE;
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/* register interrupt vector */
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nvicEnableVector(STM32_TIM14_NUMBER, 2); /* vector, priority */
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}
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void sleep_led_enable(void) {
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/* Enable the timer */
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STM32_TIM14->CR1 = STM32_TIM_CR1_CEN | STM32_TIM_CR1_URS;
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/* URS => update event only on overflow; setting UG bit disabled */
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}
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void sleep_led_disable(void) {
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/* Disable the timer */
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STM32_TIM14->CR1 = 0;
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}
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void sleep_led_toggle(void) {
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/* Toggle the timer */
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STM32_TIM14->CR1 ^= STM32_TIM_CR1_CEN;
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}
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#else /* platform selection: not on familiar chips */
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void sleep_led_init(void) {
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}
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