ibmpc: ringbuf optimization for c
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369b5cb21e
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7438f7baab
2 changed files with 18 additions and 9 deletions
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@ -19,6 +19,7 @@ static inline void ringbuf_write(ringbuf_t *buf, uint8_t data);
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static inline bool ringbuf_is_empty(ringbuf_t *buf);
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static inline bool ringbuf_is_full(ringbuf_t *buf);
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static inline void ringbuf_reset(ringbuf_t *buf);
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static inline void ringbuf_push(ringbuf_t *buf, uint8_t data);
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static inline void ringbuf_init(ringbuf_t *buf, uint8_t *array, uint8_t size)
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{
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@ -70,4 +71,10 @@ static inline void ringbuf_reset(ringbuf_t *buf)
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buf->head = 0;
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buf->tail = 0;
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}
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static inline void ringbuf_push(ringbuf_t *buf, uint8_t data)
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{
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buf->buffer[buf->head] = data;
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buf->head++;
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buf->head &= buf->size_mask;
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}
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#endif
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@ -214,11 +214,10 @@ void ibmpc_host_isr_clear(void)
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ringbuf_reset(&rb);
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}
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#define LO8(w) (*((uint8_t *)&(w)))
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#define HI8(w) (*(((uint8_t *)&(w))+1))
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// NOTE: With this ISR data line can be read within 2us after clock falling edge.
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// To read data line early as possible:
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// write naked ISR with asembly code to read the line and call C func to do other job?
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// NOTE: With this ISR data line should be read within 5us after clock falling edge.
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// Confirmed that ATmega32u4 can read data line in 2.5us from interrupt after
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// ISR prologue pushs r18, r19, r20, r21, r24, r25 r30 and r31 with GCC 5.4.0
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ISR(IBMPC_INT_VECT)
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{
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uint8_t dbit;
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@ -366,16 +365,19 @@ ISR(IBMPC_INT_VECT)
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DONE:
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// store data
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if (!ringbuf_put(&rb, isr_state & 0xFF)) {
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// buffer overflow
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ibmpc_error = IBMPC_ERR_FULL;
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ringbuf_push(&rb, isr_state & 0xFF);
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if (ringbuf_is_full(&rb)) {
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// just became full
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// Disable ISR if buffer is full
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IBMPC_INT_OFF();
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// inhibit: clock_lo
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IBMPC_CLOCK_PORT &= ~(1<<IBMPC_CLOCK_BIT);
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IBMPC_CLOCK_DDR |= (1<<IBMPC_CLOCK_BIT);
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}
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if (ringbuf_is_empty(&rb)) {
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// buffer overflow
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ibmpc_error = IBMPC_ERR_FULL;
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}
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ERROR:
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// clear for next data
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isr_state = 0x8000;
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