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ibmpc: Add handling for erroneous start bit XT(IBM)

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This is **not perferred** if it is evitable.
It allows to read start(0) as 1 wrongly at cost of 100us wait.
This commit is contained in:
tmk 2020-03-22 13:08:57 +09:00
parent 93e9ee22ce
commit 7c3b669e6f
2 changed files with 25 additions and 5 deletions
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29
tmk_core/protocol/ibmpc.c
View file

@ -244,10 +244,12 @@ ISR(IBMPC_INT_VECT)
// x x x x x x x x | *1 0 0 0 0 0 0 0 midway(8 bits received) // x x x x x x x x | *1 0 0 0 0 0 0 0 midway(8 bits received)
// b6 b5 b4 b3 b2 b1 b0 1 | 0 *1 0 0 0 0 0 0 XT_IBM-midway ^1 // b6 b5 b4 b3 b2 b1 b0 1 | 0 *1 0 0 0 0 0 0 XT_IBM-midway ^1
// b7 b6 b5 b4 b3 b2 b1 b0 | 0 *1 0 0 0 0 0 0 AT-midway ^1 // b7 b6 b5 b4 b3 b2 b1 b0 | 0 *1 0 0 0 0 0 0 AT-midway ^1
// b7 b6 b5 b4 b3 b2 b1 b0 | 1 *1 0 0 0 0 0 0 XT_Clone-done // b7 b6 b5 b4 b3 b2 b1 b0 | 1 *1 0 0 0 0 0 0 XT_Clone-done ^3
// b6 b5 b4 b3 b2 b1 b0 1 | 1 *1 0 0 0 0 0 0 XT_IBM-error ^3
// pr b7 b6 b5 b4 b3 b2 b1 | 0 0 *1 0 0 0 0 0 AT-midway[b0=0] // pr b7 b6 b5 b4 b3 b2 b1 | 0 0 *1 0 0 0 0 0 AT-midway[b0=0]
// b7 b6 b5 b4 b3 b2 b1 b0 | 1 0 *1 0 0 0 0 0 XT_IBM-done ^2 // b7 b6 b5 b4 b3 b2 b1 b0 | 1 0 *1 0 0 0 0 0 XT_IBM-done ^2
// pr b7 b6 b5 b4 b3 b2 b1 | 1 0 *1 0 0 0 0 0 AT-midway[b0=1] ^2 // pr b7 b6 b5 b4 b3 b2 b1 | 1 0 *1 0 0 0 0 0 AT-midway[b0=1] ^2
// b7 b6 b5 b4 b3 b2 b1 b0 | 1 1 *1 0 0 0 0 0 XT_IBM-error-done
// x x x x x x x x | x 1 1 0 0 0 0 0 illegal // x x x x x x x x | x 1 1 0 0 0 0 0 illegal
// st pr b7 b6 b5 b4 b3 b2 | b1 b0 0 *1 0 0 0 0 AT-done // st pr b7 b6 b5 b4 b3 b2 | b1 b0 0 *1 0 0 0 0 AT-done
// x x x x x x x x | x x 1 *1 0 0 0 0 illegal // x x x x x x x x | x x 1 *1 0 0 0 0 illegal
@ -264,10 +266,28 @@ ISR(IBMPC_INT_VECT)
// midway // midway
goto NEXT; goto NEXT;
break; break;
case 0b11000000: case 0b11000000: // ^3
// XT_Clone-done {
uint8_t us = 100;
// wait for rising and falling edge of b7 of XT_IBM
while (!(IBMPC_CLOCK_PIN&(1<<IBMPC_CLOCK_BIT)) && us) { wait_us(1); us--; }
while ( IBMPC_CLOCK_PIN&(1<<IBMPC_CLOCK_BIT) && us) { wait_us(1); us--; }
if (us) {
// XT_IBM-error: read start(0) as 1
goto NEXT;
} else {
// XT_Clone-done
isr_state = isr_state>>8;
ibmpc_protocol = IBMPC_PROTOCOL_XT_CLONE;
goto DONE;
}
}
break;
case 0b11100000:
// XT_IBM-error-done
isr_state = isr_state>>8; isr_state = isr_state>>8;
ibmpc_protocol = IBMPC_PROTOCOL_XT_CLONE; ibmpc_protocol = IBMPC_PROTOCOL_XT_ERROR;
goto DONE; goto DONE;
break; break;
case 0b10100000: // ^2 case 0b10100000: // ^2
@ -301,7 +321,6 @@ ISR(IBMPC_INT_VECT)
goto DONE; goto DONE;
break; break;
case 0b01100000: case 0b01100000:
case 0b11100000:
case 0b00110000: case 0b00110000:
case 0b10110000: case 0b10110000:
case 0b01110000: case 0b01110000:

1
tmk_core/protocol/ibmpc.h
View file

@ -74,6 +74,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define IBMPC_PROTOCOL_AT 1 #define IBMPC_PROTOCOL_AT 1
#define IBMPC_PROTOCOL_XT_IBM 2 #define IBMPC_PROTOCOL_XT_IBM 2
#define IBMPC_PROTOCOL_XT_CLONE 3 #define IBMPC_PROTOCOL_XT_CLONE 3
#define IBMPC_PROTOCOL_XT_ERROR 4
// Error numbers // Error numbers
#define IBMPC_ERR_NONE 0 #define IBMPC_ERR_NONE 0