4b42f5c1b7
This isn't needed as long as data line is read in proper timing. Current ibmpc ISR has seemed to work well for reading data line so far.
408 lines
12 KiB
C++
408 lines
12 KiB
C++
/*
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Copyright 2010,2011,2012,2013,2019 Jun WAKO <wakojun@gmail.com>
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This software is licensed with a Modified BSD License.
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All of this is supposed to be Free Software, Open Source, DFSG-free,
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GPL-compatible, and OK to use in both free and proprietary applications.
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Additions and corrections to this file are welcome.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of the copyright holders nor the names of
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* IBM PC keyboard protocol
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*/
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#include <stdbool.h>
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#include <avr/interrupt.h>
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#include <util/atomic.h>
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#include "debug.h"
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#include "timer.h"
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#include "wait.h"
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#include "ibmpc.hpp"
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#define WAIT(stat, us, err) do { \
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if (!wait_##stat(us)) { \
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error = err; \
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goto ERROR; \
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} \
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} while (0)
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IBMPC IBMPC::interface0 = IBMPC(IBMPC_CLOCK_BIT, IBMPC_DATA_BIT);
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#if defined(IBMPC_CLOCK_BIT1) && defined(IBMPC_DATA_BIT1)
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IBMPC IBMPC::interface1 = IBMPC(IBMPC_CLOCK_BIT1, IBMPC_DATA_BIT1);
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#endif
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void IBMPC::host_init(void)
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{
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// initialize reset pin to HiZ
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IBMPC_RST_HIZ();
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inhibit();
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int_init();
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int_off();
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host_isr_clear();
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}
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void IBMPC::host_enable(void)
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{
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int_on();
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idle();
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}
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void IBMPC::host_disable(void)
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{
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int_off();
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inhibit();
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}
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int16_t IBMPC::host_send(uint8_t data)
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{
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bool parity = true;
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error = IBMPC_ERR_NONE;
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uint8_t retry = 0;
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dprintf("w%02X ", data);
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// Return when receiving data
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//if (isr_state & 0x0FFF) {
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if (isr_state != 0x8000) {
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dprintf("isr:%04X ", isr_state);
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return -1;
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}
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int_off();
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RETRY:
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/* terminate a transmission if we have */
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inhibit();
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wait_us(200); // [5]p.54
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/* 'Request to Send' and Start bit */
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data_lo();
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wait_us(200);
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clock_hi(); // [5]p.54 [clock low]>100us [5]p.50
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WAIT(clock_lo, 15000, 1); // [5]p.54 T13M, -10ms [5]p.50
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/* Data bit[2-9] */
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for (uint8_t i = 0; i < 8; i++) {
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wait_us(15);
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if (data&(1<<i)) {
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parity = !parity;
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data_hi();
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} else {
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data_lo();
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}
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WAIT(clock_hi, 50, 2);
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WAIT(clock_lo, 50, 3);
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}
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/* Parity bit */
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wait_us(15);
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if (parity) { data_hi(); } else { data_lo(); }
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WAIT(clock_hi, 50, 4);
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WAIT(clock_lo, 50, 5);
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/* Stop bit */
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wait_us(15);
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data_hi();
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/* Ack */
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WAIT(data_lo, 300, 6);
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WAIT(data_hi, 300, 7);
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WAIT(clock_hi, 300, 8);
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// clear buffer to get response correctly
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host_isr_clear();
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idle();
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int_on();
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return host_recv_response();
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ERROR:
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// Retry for Z-150 AT start bit error
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if (error == 1 && retry++ < 10) {
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error = IBMPC_ERR_NONE;
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dprintf("R ");
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goto RETRY;
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}
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isr_debug = isr_state;
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error |= IBMPC_ERR_SEND;
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inhibit();
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wait_ms(2);
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idle();
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int_on();
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return -1;
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}
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/*
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* Receive data from keyboard
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*/
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int16_t IBMPC::host_recv(void)
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{
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int16_t ret = -1;
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// Enable ISR if buffer was full
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if (ringbuf_is_full()) {
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host_isr_clear();
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int_on();
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idle();
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}
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ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
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ret = ringbuf_get();
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}
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if (ret != -1) dprintf("r%02X ", ret&0xFF);
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return ret;
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}
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int16_t IBMPC::host_recv_response(void)
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{
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// Command may take 25ms/20ms at most([5]p.46, [3]p.21)
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uint8_t retry = 25;
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int16_t data = -1;
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while (retry-- && (data = host_recv()) == -1) {
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wait_ms(1);
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}
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return data;
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}
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void IBMPC::host_isr_clear(void)
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{
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isr_debug = 0;
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protocol = 0;
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error = 0;
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isr_state = 0x8000;
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ringbuf_reset();
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}
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inline void IBMPC::isr(void)
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{
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uint8_t dbit;
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dbit = IBMPC_DATA_PIN&(1<<data_bit);
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// Timeout check
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uint8_t t;
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// use only the least byte of millisecond timer
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asm("lds %0, %1" : "=r" (t) : "p" (&timer_count));
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//t = (uint8_t)timer_count; // compiler uses four registers instead of one
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if (isr_state == 0x8000) {
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timer_start = t;
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} else {
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// This gives 2.0ms at least before timeout
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if ((uint8_t)(t - timer_start) >= 5) {
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isr_debug = isr_state;
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error = IBMPC_ERR_TIMEOUT;
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goto ERROR;
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// timeout error recovery - start receiving new data
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// it seems to work somehow but may not under unstable situation
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//timer_start = t;
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//isr_state = 0x8000;
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}
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}
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isr_state = isr_state>>1;
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if (dbit) isr_state |= 0x8000;
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// isr_state: state of receiving data from keyboard
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//
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// This should be initialized with 0x8000 before receiving data and
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// the MSB '*1' works as marker to discrimitate between protocols.
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// It stores sampled bit at MSB after right shift on each clock falling edge.
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//
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// XT protocol has two variants of signaling; XT_IBM and XT_Clone.
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// XT_IBM uses two start bits 0 and 1 while XT_Clone uses just start bit 1.
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// https://github.com/tmk/tmk_keyboard/wiki/IBM-PC-XT-Keyboard-Protocol
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//
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// 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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// -----------------------------------------------------
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// *1 0 0 0 0 0 0 0 | 0 0 0 0 0 0 0 0 Initial state(0x8000)
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//
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// x x x x x x x x | 0 0 0 0 0 0 0 0 midway(0-7 bits received)
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// x x x x x x x x | *1 0 0 0 0 0 0 0 midway(8 bits received)
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// b6 b5 b4 b3 b2 b1 b0 1 | 0 *1 0 0 0 0 0 0 XT_IBM-midway ^1
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// b7 b6 b5 b4 b3 b2 b1 b0 | 0 *1 0 0 0 0 0 0 AT-midway ^1
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// b7 b6 b5 b4 b3 b2 b1 b0 | 1 *1 0 0 0 0 0 0 XT_Clone-done
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// pr b7 b6 b5 b4 b3 b2 b1 | 0 0 *1 0 0 0 0 0 AT-midway[b0=0]
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// b7 b6 b5 b4 b3 b2 b1 b0 | 1 0 *1 0 0 0 0 0 XT_IBM-done ^2
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// pr b7 b6 b5 b4 b3 b2 b1 | 1 0 *1 0 0 0 0 0 AT-midway[b0=1] ^2
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// x x x x x x x x | 0 1 *1 0 0 0 0 0 illegal
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// x x x x x x x x | 1 1 *1 0 0 0 0 0 illegal
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// st pr b7 b6 b5 b4 b3 b2 | b1 b0 0 *1 0 0 0 0 AT-done
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// x x x x x x x x | x x 1 *1 0 0 0 0 illegal
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// all other states than above illegal
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//
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// ^1: AT and XT_IBM takes same state.
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// ^2: AT and XT_IBM takes same state in case that AT b0 is 1,
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// we have to check AT stop bit to discriminate between the two protocol.
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switch (isr_state & 0xFF) {
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case 0b00000000:
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case 0b10000000:
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case 0b01000000: // ^1
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case 0b00100000:
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// midway
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goto NEXT;
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break;
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case 0b11000000:
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// XT_Clone-done
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isr_debug = isr_state;
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isr_state = isr_state>>8;
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protocol = IBMPC_PROTOCOL_XT_CLONE;
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goto DONE;
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break;
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case 0b10100000: // ^2
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{
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uint8_t us = 100;
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// wait for rising and falling edge of AT stop bit to discriminate between XT and AT
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if (!protocol) {
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while (!(IBMPC_CLOCK_PIN & clock_mask) && us) { wait_us(1); us--; }
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while ( (IBMPC_CLOCK_PIN & clock_mask) && us) { wait_us(1); us--; }
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} else if (protocol == IBMPC_PROTOCOL_XT_IBM) {
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us = 0;
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}
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if (us) {
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// found stop bit: AT-midway - process the stop bit in next ISR
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goto NEXT;
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} else {
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// no stop bit: XT_IBM-done
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isr_debug = isr_state;
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isr_state = isr_state>>8;
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protocol = IBMPC_PROTOCOL_XT_IBM;
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goto DONE;
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}
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}
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break;
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case 0b00010000:
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case 0b10010000:
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case 0b01010000:
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case 0b11010000:
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// AT-done
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isr_debug = isr_state;
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// Detect AA with parity error for AT/XT Auto-Switching support
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// https://github.com/tmk/tmk_keyboard/wiki/IBM-PC-Keyboard-Converter#atxt-auto-switching
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// isr_state: st pr b7 b6 b5 b4 b3 b2 | b1 b0 0 *1 0 0 0 0
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// 1 '0' 1 0 1 0 1 0 | 1 0 0 *1 0 0 0 0
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if (isr_state == 0xAA90) {
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error = IBMPC_ERR_PARITY_AA;
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goto ERROR;
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}
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// parit bit check
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{
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// isr_state: st pr b7 b6 b5 b4 b3 b2 | b1 b0 0 *1 0 0 0 0
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uint8_t p = (isr_state & 0x4000) ? 1 : 0;
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p ^= (isr_state >> 6);
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while (p & 0xFE) {
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p = (p >> 1) ^ (p & 0x01);
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}
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if (p == 0) {
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error = IBMPC_ERR_PARITY;
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goto ERROR;
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}
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}
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// stop bit check
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if (isr_state & 0x8000) {
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protocol = IBMPC_PROTOCOL_AT;
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} else {
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// Zenith Z-150 AT(beige/white lable) asserts stop bit as low
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// https://github.com/tmk/tmk_keyboard/wiki/IBM-PC-AT-Keyboard-Protocol#zenith-z-150-beige
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protocol = IBMPC_PROTOCOL_AT_Z150;
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}
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isr_state = isr_state>>6;
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goto DONE;
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break;
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case 0b01100000:
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case 0b11100000:
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case 0b00110000:
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case 0b10110000:
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case 0b01110000:
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case 0b11110000:
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default: // xxxx_oooo(any 1 in low nibble)
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// Illegal
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protocol = 0;
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isr_debug = isr_state;
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error = IBMPC_ERR_ILLEGAL;
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goto ERROR;
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break;
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}
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DONE:
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// store data
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ringbuf_put(isr_state & 0xFF);
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if (ringbuf_is_full()) {
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// Disable ISR if buffer is full
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int_off();
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// inhibit: clock_lo() instead of inhibit() for ISR optimization
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clock_lo();
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}
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if (ringbuf_is_empty()) {
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// buffer overflow
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error = IBMPC_ERR_FULL;
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}
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goto END;
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ERROR:
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// inhibit: Use clock_lo() instead of inhibit() for ISR optimization
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clock_lo();
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END:
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// clear for next data
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isr_state = 0x8000;
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NEXT:
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return;
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}
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/* send LED state to keyboard */
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void IBMPC::host_set_led(uint8_t led)
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{
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if (0xFA == host_send(0xED)) {
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host_send(led);
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}
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}
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// NOTE: With this ISR data line should be read within 5us after clock falling edge.
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// Confirmed that ATmega32u4 can read data line in 2.5us from interrupt after
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// ISR prologue pushs r18, r19, r20, r21, r24, r25 r30 and r31 with GCC 5.4.0
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ISR(IBMPC_INT_VECT)
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{
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IBMPC::interface0.isr();
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}
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#if defined(IBMPC_CLOCK_BIT1) && defined(IBMPC_DATA_BIT1) && defined(IBMPC_INT_VECT1)
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ISR(IBMPC_INT_VECT1)
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{
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IBMPC::interface1.isr();
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}
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#endif
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