pc98: Fix glitch and reset signal

- Change order of setting PORT and DDR to prevent glitch
- RST pin cannot be controlled after USART starts
This commit is contained in:
tmk 2022-02-14 16:59:53 +09:00
parent 85b69a7eab
commit 4ffa771f0f

View file

@ -123,15 +123,12 @@ RETRY:
void matrix_init(void) void matrix_init(void)
{ {
PC98_RST_DDR |= (1<<PC98_RST_BIT);
PC98_RDY_DDR |= (1<<PC98_RDY_BIT);
PC98_RTY_DDR |= (1<<PC98_RTY_BIT);
PC98_RST_PORT |= (1<<PC98_RST_BIT); PC98_RST_PORT |= (1<<PC98_RST_BIT);
PC98_RST_DDR |= (1<<PC98_RST_BIT);
PC98_RDY_PORT |= (1<<PC98_RDY_BIT); PC98_RDY_PORT |= (1<<PC98_RDY_BIT);
PC98_RDY_DDR |= (1<<PC98_RDY_BIT);
PC98_RTY_PORT |= (1<<PC98_RTY_BIT); PC98_RTY_PORT |= (1<<PC98_RTY_BIT);
PC98_RTY_DDR |= (1<<PC98_RTY_BIT);
serial_init();
// PC98 reset // PC98 reset
// https://archive.org/stream/PC9800TechnicalDataBookHARDWARE1993/PC-9800TechnicalDataBook_HARDWARE1993#page/n359 // https://archive.org/stream/PC9800TechnicalDataBookHARDWARE1993/PC-9800TechnicalDataBook_HARDWARE1993#page/n359
@ -140,6 +137,8 @@ void matrix_init(void)
_delay_us(15); // > 13us _delay_us(15); // > 13us
PC98_RST_PORT |= (1<<PC98_RST_BIT); // RST: high PC98_RST_PORT |= (1<<PC98_RST_BIT); // RST: high
serial_init();
_delay_ms(50); _delay_ms(50);
if (pc98_is_newtype()) xprintf("new type\n"); else xprintf("old type\n"); if (pc98_is_newtype()) xprintf("new type\n"); else xprintf("old type\n");
pc98_inhibit_repeat(); pc98_inhibit_repeat();