ibmpc: Fix stop bit check code in ISR
removing function call makes prologue/epilogue shorter
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1 changed files with 19 additions and 10 deletions
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@ -191,6 +191,8 @@ int16_t ibmpc_host_recv_response(void)
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return data;
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return data;
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}
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}
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// NOTE: to read data line early as possible:
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// write naked ISR with asembly code to read the line and call C func to do other job?
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ISR(IBMPC_INT_VECT)
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ISR(IBMPC_INT_VECT)
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{
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{
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uint8_t dbit;
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uint8_t dbit;
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@ -240,16 +242,23 @@ ISR(IBMPC_INT_VECT)
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goto DONE;
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goto DONE;
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break;
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break;
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case 0b10100000:
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case 0b10100000:
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// XT IBM-done or AT-midway
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{
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// wait and check for clock of AT stop bit
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uint8_t us = 150;
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if (wait_clock_hi(100) && wait_clock_lo(100)) { // FIXME this makes ISR prologe long
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// wait for rising and falling edge of AT stop bit
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// AT-midway
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while (!(IBMPC_CLOCK_PIN&(1<<IBMPC_CLOCK_BIT)) && us) { wait_us(1); us--; }
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return;
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while ( IBMPC_CLOCK_PIN&(1<<IBMPC_CLOCK_BIT) && us) { wait_us(1); us--; }
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} else {
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// XT-IBM-done
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if (us) {
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recv_data = (isr_data>>8) & 0xFF;
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// found stop bit: return immediately and process the stop bit in ISR
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goto DONE;
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// AT-midway
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}
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return;
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} else {
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// no stop bit
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// XT-IBM-done
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recv_data = (isr_data>>8) & 0xFF;
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goto DONE;
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}
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}
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break;
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break;
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case 0b00010000:
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case 0b00010000:
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case 0b10010000:
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case 0b10010000:
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